Realization of 6, Tap Finite Impulse Response Interpolation Filter  for H.264/AVC Encoder

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Realization of 6, Tap Finite Impulse Response Interpolation Filter for H.264/AVC Encoder

WANG Qingchun¹, CAO Xixin², LU Weijun², HE Xiaoyan³CAO Jian²

¹Key Laboratory of Integrated Microsystems,Shenzhen Graduate School, Peking University, Shenzhen, 518055;Corresponding Author, E-mail:wangqc328@163.com;　²School of Software and Microelectronics, Peking University, Beijing, 102600;³Department of Physics and Computer Science, Ankang College, Ankang, 725000

Received:2006-06-29 Online:2007-05-20 Published:2007-05-20

H.264/AVC编码器中6阶插值滤波器的实现

王庆春¹,曹喜信²,路卫军²,何晓燕³,曹健²

¹北京大学深圳研究生院集成微系统重点实验室,深圳,518055;通讯作者,E-mail:wangqc328@163.com; ²北京大学软件与微电子学院,北京,102600;³安康学院物理与计算机系,安康,725000

Abstract

Abstract: It is proposed that four hardware architectures of 6, tap finite impulse response interpolation filter for the design of H.264/AVC encoder (SOC). Moreover, based on comparative analysis of Synopsys Design Compiler to implement the hardware at the same constraint, an efficient half pixel interpolation filter (6, tap FIR) architecture had been given finally.

Key words: H.264/AVC video encoder, tap finite impulse response interpolation filter, chip area, delay

摘要： 针对H.264/AVC视频编码器的系统芯片设计,提出了6阶1/2像素插值滤波器的4种具体实现结构;并且在相同的约束条件下,使用Synopsys综合工具比较了各自的实现代价,最终给出了6阶1/2像素插值滤波器的优化实现结构。

关键词: H.264/AVC视频编码器, 6阶插值滤波器, 芯片面积, 路径延迟

CLC Number:

TP332.2

WANG Qingchun,CAO Xixin,LU Weijun,HE XiaoyanCAO Jian. Realization of 6, Tap Finite Impulse Response Interpolation Filter for H.264/AVC Encoder[J]. Acta Scientiarum Naturalium Universitatis Pekinensis.

王庆春,曹喜信,路卫军,何晓燕,曹健. H.264/AVC编码器中6阶插值滤波器的实现[J]. 北京大学学报（自然科学版）.

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https://xbna.pku.edu.cn/EN/Y2007/V43/I3/417

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Realization of 6, Tap Finite Impulse Response Interpolation Filter for H.264/AVC Encoder

H.264/AVC编码器中6阶插值滤波器的实现

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