北京大学学报(自然科学版)

一种3D IC TSV互连的内建自测试和自修复方法

王秋实1,2,谭晓慧1,2,龚浩然1,2,冯建华1   

  1. 1. 北京大学微纳电子学系, 北京 100871; 2. 北京大学深圳研究生院集成微系统重点实验室, 深圳 518055;
  • 收稿日期:2013-04-03 出版日期:2014-07-20 发布日期:2014-07-20

A Built-In Self-Test & Repair Scheme for TSV Interconnect in 3D ICs

WANG Qiushi1,2, TAN Xiaohui1,2, GONG Haoran1,2, FENG Jianhua1   

  1. 1. Department of Microelectronics, Peking University, Beijing 100871; 2. Key Lab of Integrated Microsystems Science Engineering and Application, Shenzhen Graduate School of Peking University, Shenzhen 518055;
  • Received:2013-04-03 Online:2014-07-20 Published:2014-07-20

摘要: 提出一种检测和修复有缺陷TSV的内建自测试(BIST)和内建自修复(BISR)的方法。采用BIST电路测试TSV, 根据测试结构, 采用BISR电路配置TSV映射逻辑, 有故障的TSV可被BISR电路采用TSV冗余修复。所提出的设计可减小TSV测试价格, 并减少TSV缺陷引起的成品率损失。电路模拟表明, 面积代价和时间代价是可接受的。

关键词: 三维集成电路, 硅通孔, 内建自测试, 内建自修复, 冗余

Abstract: A built-in-self-test (BIST) & built-in-self-repair (BISR) scheme for detecting and repairing defective TSVs are proposed. The BIST circuit tests the TSVs, then the BISR circuit configures the TSV mapping logic according to the test result. The faulty TSV will be repaired by BISR circuit using TSV redundancy. The proposed design reduces the cost of TSV test, as well as mitigates the yield loss caused by TSV defects. Circuit simulations show that the area overhead and time overhead are acceptable.

Key words: 3D IC, TSV, BIST, BISR, redundancy

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