关键词: 仿真器, 时钟精确, 可重构处理器, 指令集, 计算模型

Abstract: A hierarchically modularized design based clock accurate simulator platform ReSim is proposed for the flexible interconnection, expandability and dense computational characteristics of reconfigurable processor ReMAP. The simulator is designed under three hierarchy software framework, which contains interconnect modules to accelerate various interconnection architecture evaluation, control modules to simulate different compute model. The simulator can quickly establish the reconfigurable processor model and test the function validity of processor architecture, as well as evaluating the performance under the control of clock driving module for the whole system. The result shows that ReSim can support the evaluation and simulation of the reconfigurable processor architecture ReMAP-2 effectively.

Key words: simulator, clock accurate, reconfigurable processor, instruction set, computation model