关键词: 片上网络, 系统芯片, 簇, 设计方法

Abstract: With the development of VLSI technology and increasing complexity of System-on-Chip applications, on-chip communication architecture design encounters some problems, such as throughput, power, signal integrity, latency and clock synchronization, Network-on-Chip (NoC) was introduced. With on-chip communication's specific pattern, it is of great significance to design hierarchical Network-on-Chip to improve communication performance and reduce hardware cost. This paper puts forward a hierarchical NoC design method. According to the technology and application requirements, researchers can generate several IP core subsets (“cluster”), and design a NoC architecture as inter-cluster communication requirements. Experiments show with hierarchical NoC design method, this method can improve system performance efficiently, decrease hardware cost, and meet Quality-of-Service requirements at the same time.

Key words: hierarchical, Network-on-Chip, System-on-Chip, cluster, design method