维特比译码的双读出回溯算法及ASIC实现

北京大学学报（自然科学版）

维特比译码的双读出回溯算法及ASIC实现

盛世敏,刘越,吉利久

北京大学微电子研究所，北京，100871

收稿日期:1995-07-17 出版日期:1996-01-20 发布日期:1996-01-20

The Double-readout Trace-back Algorithm for Viterbi Decoder and Its Complementation in ASIC

SHENG Shimin, LIU Yue, JI Lijiu

Institute of Microelectronics, Peking University, Beijing, 100871, meipku@pku.edu.cn

Received:1995-07-17 Online:1996-01-20 Published:1996-01-20

摘要/Abstract

摘要： 在分析维特比译码器回溯算法的基础上，归纳出回溯算法的规律，提出了双读出回溯(DRTB)算法。计算表明，DRTB算法在不增加硬件开销的情况下，使回溯运算速度达到原来的4倍。本文还介绍了基于DRTB算法幸存路径存储器单元(SMU)的ASIC结构和物理设计。对半导体集成电路的测试表明，本文提出的DRTB算法及电路结构是成功的。

关键词: 维特比译码器, 回溯, 双读出算法

Abstract: A novel double-readout trace-back(DRTB) algorithm that used in Viterbi Decoderfor likelihood path series searching is developed by analyzing the rule of trace-back operation. It increases the throughput rate up to 4 times without any additonal hardware overhead. The structural ASIC design of surviving path memory unit (SMU) toward DRTB algorithm is described and it is applied in a Viterbi Decoder IC design. With being fabricated, the test results indicate that the DRTB algorithm and circuit design are successful as prediction.

Key words: viterbi decoder, trace-back, double-readout algorithm

中图分类号:

TN764
TN47

盛世敏,刘越,吉利久. 维特比译码的双读出回溯算法及ASIC实现[J]. 北京大学学报（自然科学版）.

SHENG Shimin,LIU Yue,JI Lijiu. The Double-readout Trace-back Algorithm for Viterbi Decoder and Its Complementation in ASIC[J]. Acta Scientiarum Naturalium Universitatis Pekinensis.

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链接本文: https://xbna.pku.edu.cn/CN/

https://xbna.pku.edu.cn/CN/Y1996/V32/I1/103