Acta Scientiarum Naturalium Universitatis Pekinensis

Previous Articles     Next Articles

A Novel ESD Clamp Protection Circuit with Low Leakage Current and High Latch, up Immunity

WANG Yuan, JIA, Song1, ZHANG Ganggang, CHEN Zhongjian, JI Lijiu   

  1. Institute of Microelectronics, Peking University, Beijing, 100871, 1Corresponding Author,
  • Received:2006-04-20 Online:2007-05-20 Published:2007-05-20


王源,贾嵩1,张钢刚, 陈中建, 吉利久   

  1. 北京大学微电子研究院,北京,100871,1通讯作者,

Abstract: A novel ESD clamp protection circuit named gate, controlled SCR cascade diode string (gcSCR, CDS) is proposed. Compared with the traditional CDS device, this novel structure has a high ESD performance due to its low leakage current and low turn, on resistance by inserting a SCR transistor. A gate, controlled PMOS transistor is also used to immunize its latch, up effects. This new structure is performed in 0.35?μm CMOS process. The measured results show that it has a low leakage current about 12nA and a high ESD robustness above 8kV.

Key words: ESD, gcSCR, CDS, leakage current, latch-up effect

摘要: 提出了一种新型抗静电泄放(ESD)钳位保护电路??栅控可控硅级联二极管串(gcSCR, CDS)结构。相比传统级联二极管串(CDS)结构,新结构利用插入的SCR管减小了钳位电路的泄漏电流和导通电阻,提高了电路的抗ESD能力;利用栅控的PMOS管,提高了维持电压,抑制了闩锁效应。0.35?μm标准CMOS工艺流片结果表明,该结构泄漏电流为12nA,抗ESD能力超过8kV。

关键词: 静电泄放, gcSCR, CDS, 泄漏电流, 闩锁效应

CLC Number: