Acta Scientiarum Naturalium Universitatis Pekinensis ›› 2022, Vol. 58 ›› Issue (4): 597-601.DOI: 10.13209/j.0479-8023.2021.128

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Design of Secure Divider for Side Channel Defense

MA Bingwen1, YAN Xuesong2, LIU Hao1, LIU Pengyuan3, YI Jiangfang1,†   

  1. 1. School of Electronics Engineering and Computer Science, Peking University, Beijing 100871 2. Beijing Smart-Chip Microelectronics Technology Co, Ltd, Beijing 100192 3. STAET GRID Ningxia Marketing Service Center (Metrology Center), Yinchuan 750001
  • Received:2021-07-09 Revised:2021-12-24 Online:2022-07-20 Published:2022-07-20
  • Contact: YI Jiangfang, E-mail: yijiangfang(at)mprc.pku.edu.cn

面向侧信道防御的安全除法器设计

马兵文1, 燕雪松2, 刘豪1, 刘朋远3, 易江芳1,†   

  1. 1. 北京大学信息科学技术学院系统结构研究所, 北京 100871 2. 北京智芯微电子科技有限公司, 北京 100192 3. 国网宁夏电力有限公司营销服务中心(国网宁夏电力有限公司计量中心), 银川 750001
  • 通讯作者: 易江芳, E-mail: yijiangfang(at)mprc.pku.edu.cn
  • 基金资助:
    国家电网总部科技项目(5700-201941313A-0-0-00)资助 

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Abstract:

According to the common methods of side channel timing attack and defense using arithmetic unit, based on the division algorithms of fixed delay and variable delay, a secure divider was designed. The design considered both high performance and high security. It was suitable for different working environments. Experimental results showed that the proposed divider was effective, especially for low power embedded microprocessors for IoT applications.

Key words: microarchitecture, side channel, timing attack, divider

摘要：

在利用运算部件的侧信道计时攻击及防御方法基础上, 针对密码系统中常用的除法部件, 基于固定延迟和可变延迟除法算法, 进行面向侧信道防御的安全除法器设计。该设计兼顾性能和安全, 适用于不同需求的工作环境。实验结果证明了该方法的有效性, 尤其适合面向 IoT应用的低功耗嵌入式处理器使用。

关键词: 微体系结构, 侧信道, 计时攻击, 除法器; 

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