Acta Scientiarum Naturalium Universitatis Pekinensis

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A RISC CPU Oriented Reusable Functional Verification Platform Based on UVM

XIE Zheng, WANG Teng, YONG Shanshan, CHEN Xu, SU Jiting, WANG Xin’an   

  1. Key Lab of Integrated Micro System Science Engineering and Application, Shenzhen Graduate School of Peking University, Shenzhen 518055;
  • Received:2013-03-15 Online:2014-03-20 Published:2014-03-20

一种基于UVM面向RISC CPU的可重用功能验证平台

谢峥,王腾,雍珊珊,陈旭,苏吉婷,王新安   

  1. 北京大学深圳研究生院集成微系统科学工程与应用重点实验室, 深圳 518055;

Abstract: With a verification environment based on the UVM (universal verification Methodology) verification methodology and UVM1.1 standard library, building a reference model through the aspect-oriented paradigm and separation of properties of function, timing and structure and generating the high functional coverage test cases based on knowledge base at the transaction level, the integrated verification platform took the PKU-DSPII as example, to implement RISC CPU-oriented functional verification and domain reuse. Experimental results show that the reusability is enhanced significantly and the coverage efficiency of the test cases improves about 7% relatively.

Key words: UVM, aspect-oriented modeling, intelligent verification, domain knowledge reuse, verification automation

摘要: 以UVM验证方法学和UVM1.1标准库为基础建立验证环境, 按照面向方面的模式分离功能、时序和结构属性, 设计参考模型, 在事务级利用知识库自动产生高功能覆盖率效果的测试用例。面向RISC CPU的功能验证实现领域重用, 以PKU-DSPII为例建立完整的验证平台。实验结果表明, 可重用性得到大幅提升, 且测试用例的覆盖率效果提升约7%。

关键词: UVM, 面向方面建模, 智能验证, 领域知识重用, 验证自动化

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