[1] |
ZHANG Xiao,CUI Xiaoxin,WEI Wei,HUANG Ying,LIAO Kai,LIAO Nan,YU Dunshan.
Correlation Electromagnetic Analysis Attacks against an FPGA Implementation of AES
[J]. Acta Scientiarum Naturalium Universitatis Pekinensis, 2014, 50(4): 647-651.
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[2] |
HUANG Ying,CUI Xiaoxin,WEI Wei,ZHANG Xiao,LIAO Kai,LIAO Nan,YU Dunshan.
Research on DPA Resistant Circuit for FPGA
[J]. Acta Scientiarum Naturalium Universitatis Pekinensis, 2014, 50(4): 652-656.
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[3] |
LIAO Kai,CUI Xiaoxin,LIAO Nan,WANG Tian,ZHANG Xiao,HUANG Ying,YU Dunshan.
Efficient Implementation of Generalized Binary Hessian Curve Based Processor for RFID
[J]. Acta Scientiarum Naturalium Universitatis Pekinensis, 2014, 50(4): 657-663.
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[4] |
HU Ziyi,ZHOU Yinhao,CHEN Lan,ZHANG Xu,WANG Teng,XIE Zheng.
Low Power Integrated Circuit Technologies in Wireless Sensor Networks
[J]. Acta Scientiarum Naturalium Universitatis Pekinensis, 2014, 50(4): 664-674.
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[5] |
JIA Song,LIU Li,LI Tao,LI Xiayu,WANG Yuan,ZHANG Ganggang.
A Single Device Clock Loaded Contention Constrained RAM Latch Design
[J]. Acta Scientiarum Naturalium Universitatis Pekinensis, 2014, 50(4): 685-689.
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[6] |
WANG Teng,WANG Xin’an,XIE Zheng,HU Ziyi.
Low-Cost VLSI Implementation of Motion Estimation for H.264/AVC Encoders
[J]. Acta Scientiarum Naturalium Universitatis Pekinensis, 2014, 50(4): 768-780.
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[7] |
SHEN Jinpeng,WANG Xin’an,LIU Shan,LI Shoucheng,HU Tongning.
A Security-Enhanced UHF RFID Transponder with Novel Demodulator
[J]. Acta Scientiarum Naturalium Universitatis Pekinensis, 2014, 50(2): 214-220.
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[8] |
WANG Teng,XIE Zheng,ZHAO Yueming,WANG Xin’an,HU Ziyi,ZHANG Xu.
Design and Implementation of 16-bit RISC MCU for Medical Electronics Applications
[J]. Acta Scientiarum Naturalium Universitatis Pekinensis, 2013, 49(4): 552-562.
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[9] |
XU Feng,WANG Xin’an,CHEN Xu.
A K-Band VCO Based on EBG Resonator
[J]. Acta Scientiarum Naturalium Universitatis Pekinensis, 2013, 49(3): 383-388.
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[10] |
HU Ziyi,ZHAO Yong,WANG Xin’an,WANG Teng,XIE Zheng,HUANG Ru,ZHANG Xing.
CmDSP: A Configurable Media DSP
[J]. Acta Scientiarum Naturalium Universitatis Pekinensis, 2012, 48(4): 545-552.
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[11] |
GE Binjie,WANG Xin’an,ZHANG Xing,FENG Xiaoxing,WANG Qingqin.
Top-Down Design for MASH21 Sigma-Delta Modulator
[J]. Acta Scientiarum Naturalium Universitatis Pekinensis, 2011, 47(4): 593-598.
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[12] |
DAI Peng,YONG Shanshan,WANG Xin’an,ZHANG Xing.
Design of Reconfigurable Processor ReMAP for Video Codec
[J]. Acta Scientiarum Naturalium Universitatis Pekinensis, 2011, 47(3): 418-426.
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[13] |
DAI Peng,WEI Lai,XIN Lingxuan,WANG Xin’an,ZHANG Xing.
ReSim: A Simulator Platform for Reconfigurable Processor
[J]. Acta Scientiarum Naturalium Universitatis Pekinensis, 2011, 47(2): 231-237.
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[14] |
WANG Kui,DONG Haiying,CHENG Xu.
Clock Skew Scheduling for Area Optimization
[J]. Acta Scientiarum Naturalium Universitatis Pekinensis, 2009, 45(1): 29-34.
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[15] |
LIU Qiang,MA Fangzhen,TONG Dong,CHENG Xu.
Design Features of a High Throughput RSA Cryptoprocessor
[J]. Acta Scientiarum Naturalium Universitatis Pekinensis, 2005, 41(5): 754-763.
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