Abstract: Caches are widely used to reduce the speed gap between processors and memories. However, the spatial locality of sequential data accesses existing in many popular applications is not well exploited by conventional data cache. In response to these problems, the Split Sequential Data Cache (SSDC) is proposed, in which the sequential access detector can predict whether data accesses are sequential, and direct them to the right sub cache. Experiments show that the SSDC outperforms the conventional data cache and other schemes. It reduces the miss rate of applications with intensive sequential data accesses with only a little increment of bandwidth requirement. Meanwhile, the experimental results on SPEC2000Int show that SSDC does not hurt the performance of applications without large sequential accesses.

Key words: computer architecture, cache design, split data cache, sequential data access

摘要： 高速缓存器技术可以有效地弥补处理器和内存之间的速度差异；但是随着待处理的数据规模的增大，顺序数据访问越来越多，当前的高速缓存器在面临这类没有太多时间局部性，会造成大量高速缓存器污染的顺序数据时并不是很有效。为解决这一问题，提出了分离式顺序数据缓存器（SSDC），可以通过顺序数据流检测器动态检测出来的顺序数据访问并将其存入专用缓存器，以减少顺序数据造成的主缓存器污染，并且由于子缓存器采用顺序数据预取技术和写不分配策略，可以有效地降低缓存器的失效率。实验结果表明SSDC能够有效地降低顺序应用的失效率，并且在带宽使用等方面具有优势。另外，SPEC2000Int的评测也表明SSDC对非顺序应用的性能没有负面影响。

关键词: 计算机体系结构, 缓存器设计, 分离式数据缓存器, 顺序数据缓存器